About Me
Hello! My name is Rye Stahle-Smith, and I am a computer engineering undergraduate at the University of South Carolina (UofSC). During my time at UofSC, I have been striving towards Graduation with Leadership Distinction (GLD) in the research pathway. My academic and professional interests lie at the intersection of hardware security, machine learning (ML), and reconfigurable embedded systems. Across my research and coursework, I have developed critical skills in software/ hardware development, working with various languages such as Python, C/C++/C#, Java, and Verilog. I approach technical challenges with an emphasis on adaptability, clear communication, and collaborative problem-solving.
My personal work is mostly centered around ML-based defenses for field programmable gate arrays (FPGAs) and reconfigurable systems, particularly in real-time and resource-constrained environments. I began my independent analysis through the McNair Junior Scholars program, where I conducted vast research resulting in presentations at the 2025 UofSC Summer Research Symposium and the Association for Computing Machinery (ACM)/ Institute of Electrical and Electronics Engineers (IEEE) Student Research Competition at The 38th International Conference for High-Performance Computing, Networking, Storage and Analysis (SC25). Engaging with researchers and practitioners at both the university and international levels strengthened my ability to communicate complex ideas, evaluate feedback critically, and refine solutions within broader technical and societal contexts.
Furthermore, I have taken ownership of long-term research development through my open-source tool, Bitstream-Level Abnormality Detection for Embedded Inference (BLADEI), an ML framework for identifying hardware Trojans directly from FPGA bitstreams. The latest update expanded platform support and transitioned the pipeline to quantization to improve efficiency, portability, and real-world applicability across embedded and cloud-based environments. Maintaining this tool has required balancing technical rigor with usability and collaboration, reinforcing the importance of leadership through initiative, mentorship, and responsible stewardship of shared technical resources. I am grateful for the guidance of Dr. Rasha Karakchi, the overwhelming support from Center for Integrative and Experiential Learning (CIEL) and Office of Undergraduate Research (OUR), and the collaborative environment at UofSC that has shaped my growth as a researcher.
This ePortfolio presents three key insights that trace my development as a computer engineering researcher through integrated learning experiences within and beyond the classroom. The first insight examines how early mentorship and research exposure transformed my foundational coursework into a purposeful research direction. The second insight explores how ethical awareness and technical communication reshaped my approach to problem-solving by strengthening my technical rigor and sense of responsibility. The third insight considers how systems design and engineering stewardship deepened my understanding of long-term ownership, scalability, and collaboration in complex systems. Together, these insights demonstrate how the lessons from my academic and research experiences inform my commitment to building reliable and maintainable software systems through thoughtful design, clear communication, and responsible engineering practices.